/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2008
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *  ============================================================================
 */

/** @file cslr_tim.h
 *
 *  @brief Timer register layer header file
 *
 *  Path: \(CSLPATH)\inc
 */

/* ============================================================================
 * Revision History
 * ================
 * 21-Oct-2008 Added copy right and file prologue
 * ============================================================================
 */
#ifndef _CSLR_TIM_H_
#define _CSLR_TIM_H_

#include <cslr.h>

#include <tistdtypes.h>


/* Minimum unit = 2 bytes */

/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    volatile Uint16 WDKCKLK;
    volatile Uint16 RSVD0;
    volatile Uint16 WDKICK;
    volatile Uint16 RSVD1;
    volatile Uint16 WDSVLR;
    volatile Uint16 RSVD2;
    volatile Uint16 WDSVR;
    volatile Uint16 RSVD3;
    volatile Uint16 WDENLOK;
    volatile Uint16 RSVD4;
    volatile Uint16 WDEN;
    volatile Uint16 RSVD5;
    volatile Uint16 WDPSLR;
    volatile Uint16 RSVD6;
    volatile Uint16 WDPS;
    volatile Uint16 RSVD7;
    volatile Uint16 TCR;
    volatile Uint16 RSVD8;
    volatile Uint16 TIMPRD1;
    volatile Uint16 TIMPRD2;
    volatile Uint16 TIMCNT1;
    volatile Uint16 TIMCNT2;
    volatile Uint16 TIMINT;
} CSL_TimRegs;

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* WDKCKLK */

#define CSL_TIM_WDKCKLK_KICKLOK_MASK     (0xFFFFu)
#define CSL_TIM_WDKCKLK_KICKLOK_SHIFT    (0x0000u)
#define CSL_TIM_WDKCKLK_KICKLOK_RESETVAL (0x0000u)

#define CSL_TIM_WDKCKLK_RESETVAL         (0x0000u)

/* WDKICK */

#define CSL_TIM_WDKICK_KICK_MASK         (0xFFFFu)
#define CSL_TIM_WDKICK_KICK_SHIFT        (0x0000u)
#define CSL_TIM_WDKICK_KICK_RESETVAL     (0x0000u)

#define CSL_TIM_WDKICK_RESETVAL          (0x0000u)

/* WDSVLR */

#define CSL_TIM_WDSVLR_STVALLOK_MASK     (0xFFFFu)
#define CSL_TIM_WDSVLR_STVALLOK_SHIFT    (0x0000u)
#define CSL_TIM_WDSVLR_STVALLOK_RESETVAL (0x0000u)

#define CSL_TIM_WDSVLR_RESETVAL          (0x0000u)

/* WDSVR */

#define CSL_TIM_WDSVR_STRTVAL_MASK       (0xFFFFu)
#define CSL_TIM_WDSVR_STRTVAL_SHIFT      (0x0000u)
#define CSL_TIM_WDSVR_STRTVAL_RESETVAL   (0x0000u)

#define CSL_TIM_WDSVR_RESETVAL           (0x0000u)

/* WDENLOK */

#define CSL_TIM_WDENLOK_ENLOK_MASK       (0xFFFFu)
#define CSL_TIM_WDENLOK_ENLOK_SHIFT      (0x0000u)
#define CSL_TIM_WDENLOK_ENLOK_RESETVAL   (0x0000u)

#define CSL_TIM_WDENLOK_RESETVAL         (0x0000u)

/* WDEN */

#define CSL_TIM_WDEN_RSV_MASK            (0xFFFEu)
#define CSL_TIM_WDEN_RSV_SHIFT           (0x0001u)
#define CSL_TIM_WDEN_RSV_RESETVAL        (0x0000u)

#define CSL_TIM_WDEN_EN_MASK             (0x0001u)
#define CSL_TIM_WDEN_EN_SHIFT            (0x0000u)
#define CSL_TIM_WDEN_EN_RESETVAL         (0x0000u)
/*----EN Tokens----*/
#define CSL_TIM_WDEN_EN_DISABLE          (0x0000u)
#define CSL_TIM_WDEN_EN_ENABLE           (0x0001u)

#define CSL_TIM_WDEN_RESETVAL            (0x0000u)

/* WDPSLR */

#define CSL_TIM_WDPSLR_PSLOK_MASK        (0xFFFFu)
#define CSL_TIM_WDPSLR_PSLOK_SHIFT       (0x0000u)
#define CSL_TIM_WDPSLR_PSLOK_RESETVAL    (0x0000u)

#define CSL_TIM_WDPSLR_RESETVAL          (0x0000u)

/* WDPS */

#define CSL_TIM_WDPS_PS_MASK             (0xFFFFu)
#define CSL_TIM_WDPS_PS_SHIFT            (0x0000u)
#define CSL_TIM_WDPS_PS_RESETVAL         (0x0000u)

#define CSL_TIM_WDPS_RESETVAL            (0x0000u)

/* TCR */

#define CSL_TIM_TCR_TIMEN_MASK           (0x8000u)
#define CSL_TIM_TCR_TIMEN_SHIFT          (0x000Fu)
#define CSL_TIM_TCR_TIMEN_RESETVAL       (0x0000u)
/*----TIMEN Tokens----*/
#define CSL_TIM_TCR_TIMEN_DISABLE        (0x0000u)
#define CSL_TIM_TCR_TIMEN_ENABLE         (0x0001u)


#define CSL_TIM_TCR_PSCDIV_MASK          (0x003Cu)
#define CSL_TIM_TCR_PSCDIV_SHIFT         (0x0002u)
#define CSL_TIM_TCR_PSCDIV_RESETVAL      (0x0000u)

#define CSL_TIM_TCR_AUTORELOAD_MASK      (0x0002u)
#define CSL_TIM_TCR_AUTORELOAD_SHIFT     (0x0001u)
#define CSL_TIM_TCR_AUTORELOAD_RESETVAL  (0x0000u)
/*----AUTORELOAD Tokens----*/
#define CSL_TIM_TCR_AUTORELOAD_DISABLE   (0x0000u)
#define CSL_TIM_TCR_AUTORELOAD_ENABLE    (0x0001u)

#define CSL_TIM_TCR_START_MASK           (0x0001u)
#define CSL_TIM_TCR_START_SHIFT          (0x0000u)
#define CSL_TIM_TCR_START_RESETVAL       (0x0000u)

#define CSL_TIM_TCR_RESETVAL             (0x0000u)

/* TIMPRD1 */

#define CSL_TIM_TIMPRD1_PRD1_MASK        (0xFFFFu)
#define CSL_TIM_TIMPRD1_PRD1_SHIFT       (0x0000u)
#define CSL_TIM_TIMPRD1_PRD1_RESETVAL    (0x0000u)

#define CSL_TIM_TIMPRD1_RESETVAL         (0x0000u)

/* TIMPRD2 */

#define CSL_TIM_TIMPRD2_PRD2_MASK        (0xFFFFu)
#define CSL_TIM_TIMPRD2_PRD2_SHIFT       (0x0000u)
#define CSL_TIM_TIMPRD2_PRD2_RESETVAL    (0x0000u)

#define CSL_TIM_TIMPRD2_RESETVAL         (0x0000u)

/* TIMCNT1 */

#define CSL_TIM_TIMCNT1_TIM1_MASK        (0xFFFFu)
#define CSL_TIM_TIMCNT1_TIM1_SHIFT       (0x0000u)
#define CSL_TIM_TIMCNT1_TIM1_RESETVAL    (0x0000u)

#define CSL_TIM_TIMCNT1_RESETVAL         (0x0000u)

/* TIMCNT2 */

#define CSL_TIM_TIMCNT2_TIM2_MASK        (0xFFFFu)
#define CSL_TIM_TIMCNT2_TIM2_SHIFT       (0x0000u)
#define CSL_TIM_TIMCNT2_TIM2_RESETVAL    (0x0000u)

#define CSL_TIM_TIMCNT2_RESETVAL         (0x0000u)

/* TIMINT */


#define CSL_TIM_TIMINT_INT_MASK          (0x0001u)
#define CSL_TIM_TIMINT_INT_SHIFT         (0x0000u)
#define CSL_TIM_TIMINT_INT_RESETVAL      (0x0000u)
/*----INT Tokens----*/
#define CSL_TIM_TIMINT_INT_CLEAR         (0x0000u)
#define CSL_TIM_TIMINT_INT_SET           (0x0001u)

#define CSL_TIM_TIMINT_RESETVAL          (0x0000u)

#endif
